Field of Invention
The present invention relates to the field of liquid crystal display technology, and more particularly to a baseplate and a display panel based on an LTPS (Low-Temperature Poly-Si) panel, which is especially used for signal testing.
Description of Prior Art
With the development of LTPS semi-conductor thin-film transistors and their characteristic extremely high carrier mobility, integrated circuits surrounding the panel become a focus of the industry. Lots of research into SOP (System on Panel) is emerging, which is making SOP become reality step by step.
In a general panel-design process, cell test circuits are limited to testing a panel after box formation, with a lower utilization rate.
In a testing process to a driving signal by using a conventional cell test circuit, a loading of a GOA (Gate on Array) of a panel extremely influences an RC loading of the driving signal, and influences a test of a low RC loading oscillogram while passing through a WOA (Wire on Array) region from an IC (Integrated Chip).
Refer to FIG. 1, which is an illustrative diagram of a baseplate circuit of a conventional display panel. The base plate comprises an active region 11, a GOA region 18, a fanout region 12, a WOA region 13, an IC region 14, a FPC (Flexible Printed Circuit) region 15, and a cell test region 16. The active region 11 is used to display a pixel. The GOA region is used to generate gate driving signals of thin film transistors inside the panel. The fanout region 12 is used to wire data lines between the IC region 14 and the active region 11. The cell test region 16 comprises a plurality of testing pads 17, and the cell test region 16 is used to test display effects of the cells. The WOA region 13 is used to connect wires surrounding the panel. The IC region 14 is used to connect ICs, and to drive circuits and thin film transistors inside the panel. The FPC region 15 is used to connect to a main board.
FIG. 2 is an illustrative drawing of the pixel test circuit of FIG. 1. When performing the pixel test, the IC region 14 is unconnected. Signals are inputted into wirings of the WOA region 13, then connected with the wirings of the GOA region 18 through the wirings of the WOA region 13 to drive the active region 11. According to FIG. 2, in the panel design, the signal lines are needed to wire out from the IC region 14 corresponding with the signal lines of the cell test region 16 in order to perform a driving control of the panel 10 by the IC region 14 through after the IC region is connected.
In the conventional panel, the plurality of testing pads 17 shown in FIG. 2 are used to test signals. The signal tested is a waveform after passing through a high RC loading of the WOA region 13 and the GOA region 18. If the RC loading is malfunctioned, it is hard to determine whether a problem is in the WOA region 13 or the GOA region 18.
So, there is a need to provide a technical proposal to solve the above problem.